VLSI Design

Q.1. Write down the equations for Ids of an n-channel enhancement MOSFET operating in Non-saturated region and saturated region. [2]

Q.2. Draw the circuit diagram for CMOS two-input NAND gates. [2]

Q.3. Draw the basic circuit of NMOS and CMOS inverter. [2]

Q.4. What are the advantages and disadvantages of dynamic logic? [2]

Q.5. What parameters to be consider while identifying the FPGA? [2]

Q.6. What is NORA CMOS? [2]

Q.7. What is meant by channel length modulation in NMOS transistors? [2]

Q.8. Differentiate between SRAM and DRAM? [2]

Q.9. Draw a 1-Transistor dynamic RAM cell. [2]

Q.10. Mention different clocking mechanisms. [2]

Q.1. What is threshold voltage of a MOS device and explain its significance. [8]

Q.2. Prove that the pull-up to pull-down ratio for NMOS inverter is 4:1 when it is driven by another inverter. [8]

Q.3. What is 'Euler path'? What is use of it? Explain with a suitable example. [8]

Q.4. Draw the CMOS logic circuit for the Boolean expression Z=[A(B+C)+DE] and explain. [8]

Q.5. What is a stick diagram and explain about different symbols used for components in stick diagram? [8]

Q.6. Derive the propagation delay for NMOS inverter? [8]

Q.7. Explain the Domino logic with neat diagram. [8]

Q.1. Explain the dynamic behavior of MOSFET transistor with neat diagram. [15]

Q.2. Write the layout design rules and draw diagram for four input NAND and NOR gate. [15]

Q.3. Explain the static and dynamic power dissipation in CMOS circuits with necessary diagrams and expressions. [15]

Q.4. Explain about building block architecture of FPGA. [15]

Q.5. What do you mean by VHDL? Write a VHDL code for - (a) Full Adder (b) D Flip-flop. [15]