Question 1

Q.1. What is Cache Memory?

Accepted Answer

Cache memory is a small, high-speed memory placed between the CPU and main memory that stores frequently accessed data/instructions to reduce average memory access time.

Question 2

Q.2. Explain the input out-put processor.

Accepted Answer

An I/O processor (IOP) is a specialized processor that manages input/output operations independently of the CPU, handling data transfer between peripherals and memory to free the CPU for computation.

Question 3

Q.3. Define Computer Architecture.

Accepted Answer

Computer Architecture refers to the conceptual design and functional structure of a computer system, defining its instruction set, data formats, addressing modes, and the interface between hardware and software.

Question 4

Q.4. What is Von-Neuman Architecture? Define.

Accepted Answer

Von-Neumann Architecture is a computer design in which both program instructions and data share the same memory and a single bus, executed sequentially by fetching, decoding, and executing one instruction at a time.

Question 5

Q.5. Differentiate between RAM and ROM.

Accepted Answer

RAM (Random Access Memory) is volatile, read-write memory used for temporary program/data storage; ROM (Read Only Memory) is non-volatile memory that permanently stores fixed data/firmware and generally cannot be modified during normal operation.

Question 6

Q.6. What is Virtual Memory?

Accepted Answer

Virtual memory is a memory management technique that gives programs the illusion of a large, contiguous address space by using disk storage to extend physical RAM, with the OS/MMU mapping virtual addresses to physical ones.

Question 7

Q.7. Mention the various phases in executing an instruction.

Accepted Answer

The phases of instruction execution are: Fetch (retrieve instruction from memory), Decode (interpret opcode and operands), Execute (perform the operation), and Store/Write-back (save the result), often followed by updating the program counter.

Question 8

Q.8. How overflow occurs in subtraction?

Accepted Answer

Overflow in subtraction occurs when the result of subtracting two signed numbers exceeds the representable range, typically detected when the carry into the sign bit differs from the carry out of the sign bit.

Question 9

Q.9. Distinguish pipelining from parallelism.

Accepted Answer

Pipelining overlaps the execution of multiple instructions across different stages within a single processor for increased throughput, while parallelism uses multiple processors/execution units to simultaneously execute independent instructions or tasks.

Question 10

Q.10. Define segmentation.

Accepted Answer

Segmentation is a memory management technique that divides a program's logical address space into variable-sized, logically meaningful segments (e.g., code, data, stack), each mapped independently to physical memory.

Question 11

Q.1. Explain Flynn's classification of parallel processing with necessary dia…

Accepted Answer

Flynn's classification categorizes computer architectures into four classes based on the multiplicity of instruction and data streams: SISD (single processor), SIMD (array/vector processors), MISD (rare, pipelined redundant systems), and MIMD (multiprocessors/multicomputers).

Question 12

Q.2. Is there any difference between RISC and CISC computers? Explain.

Accepted Answer

RISC (Reduced Instruction Set Computer) uses a small set of simple, fixed-length, single-cycle instructions optimized for pipelining, while CISC (Complex Instruction Set Computer) uses a large set of complex, variable-length, multi-cycle instructions that can directly perform elaborate operations.

Question 13

Q.3. What are addressing modes? Explain each in brief with diagram.

Accepted Answer

Addressing modes specify how the effective operand address is determined from an instruction; common modes include immediate, direct, indirect, register, register indirect, indexed, and relative addressing.

Question 14

Q.4. Describe in detail about the bus arbitration techniques in DMA.

Accepted Answer

Bus arbitration in DMA resolves conflicts when multiple devices request bus access simultaneously; common techniques are daisy chaining (priority by physical position), polling (software-based sequential checking), and independent request/grant lines (centralized/distributed arbitration).

Question 15

Q.5. Describe the procedure for addition and subtraction for fixed point numb…

Accepted Answer

Fixed-point addition/subtraction of signed numbers is performed using 2's complement representation, where subtraction is implemented as addition of the complemented subtrahend, with overflow detected via carry comparison at the sign bit.

Question 16

Q.6. Explain the concept of pipeline in detail.

Accepted Answer

Pipelining divides instruction execution into sequential stages (e.g., fetch, decode, execute, write-back), allowing multiple instructions to be processed concurrently at different stages, increasing throughput analogous to an assembly line.

Question 17

Q.7. How can we improve the performance of Cache Memory?

Accepted Answer

Cache performance can be improved by increasing hit ratio through better replacement policies, larger/associative cache, multi-level caching, and write strategies (write-back vs write-through), and by reducing miss penalty through prefetching and larger block sizes.

Question 18

Q.1. An address space is specified by 24 units and the corresponding memory s…

Accepted Answer

With a 24-bit address space and 16-bit memory space, the address space has 2^24 words, memory space has 2^16 words, and with a page size of 2^k words, there are 2^(24-k) pages and 2^(16-k) blocks.

Question 19

Q.2. Explain the following terms with reference to non Von-Neumann Machines:

Accepted Answer

SISD, SIMD, MISD and MIMD are Flynn's four classes of computer organization based on instruction/data stream multiplicity, ranging from single-processor sequential machines (SISD) to fully parallel multiprocessor systems (MIMD).

Question 20

Q.3. Describe various instruction formats and illustrate the same with example.

Accepted Answer

Common instruction formats include three-address, two-address, one-address (accumulator-based), and zero-address (stack-based) formats, differing in how many operand addresses are explicitly specified within the instruction.

Question 21

Q.4. Explain with an example about the operations and operands of the compute…

Accepted Answer

Computer hardware operations (arithmetic, logical, shift, transfer, I/O, control) act upon operands (data) held in registers or memory, with the instruction's opcode specifying the operation and its address fields specifying the operand locations.

Question 22

Q.5. Write the short notes on the following:

Accepted Answer

Parallel processing executes multiple operations simultaneously across multiple units; microprogrammed computers use stored microinstructions to implement the control unit; associative memory is content-addressable; stacks (LIFO) and queues (FIFO) are fundamental linear data structures; subroutines are reusable, callable instruction blocks.