Q4Computer Architecture

Every machine instruction fundamentally consists of an operation (specified by the opcode) to be performed upon one or more operands (data values), which may reside in CPU registers, main memory, or be given directly as constants within the instruction.

Operations performed by computer hardware generally fall into several categories: data transfer operations (moving data between registers, memory, and I/O, e.g., LOAD, STORE, MOV), arithmetic operations (ADD, SUB, MUL, DIV, INC, DEC performed by the ALU), logical operations (AND, OR, NOT, XOR performed bitwise on operands), shift operations (logical/arithmetic shifts and rotates, used for fast multiplication/division by powers of two and bit manipulation), and program control operations (branch, jump, call, return, which alter the normal sequential flow of instruction execution based on conditions or unconditionally).

Operands are the actual data values that operations act upon, and can be specified through the various addressing modes discussed elsewhere in this paper (immediate, direct, indirect, register, indexed, etc.). Operands can be simple scalar values, or can involve more complex data structures such as arrays (accessed via indexed addressing, where an index register combined with a base address selects a specific array element) or pointers (accessed via indirect addressing, where the operand address is itself stored in another location).

Worked example: consider the instruction ADD R1, R2, [R3+4], computing R1 = R2 + Memory[R3+4]. Here the opcode ADD specifies an arithmetic operation; R1 is the destination operand (using register addressing); R2 is a source operand (also register addressing); and [R3+4] is a source operand using indexed/base-displacement addressing, where the effective memory address is computed by adding the constant displacement 4 to the contents of register R3, and the value fetched from that computed memory location becomes the actual data operand for the addition. This single instruction demonstrates how a single operation (ADD) can simultaneously combine multiple different operand-addressing mechanisms (register-direct and indexed-memory) within one instruction, illustrating the interplay between the operation specified by the opcode and the various ways operands can be located and fetched by the hardware.

Data types of operands: beyond their addressing mode, operands also differ in their underlying data type, which the hardware must correctly interpret to perform the operation — common types include signed/unsigned integers (of varying bit widths, e.g., 8/16/32/64-bit), floating-point numbers (typically IEEE-754 single or double precision, requiring specialized floating-point arithmetic units distinct from the integer ALU), characters/strings (single bytes or sequences thereof, often processed by dedicated string-manipulation instructions in CISC architectures), and Boolean/bit-field data (used by logical and shift operations). The instruction's opcode itself often implicitly encodes the expected operand data type (e.g., separate ADD and FADD opcodes for integer versus floating-point addition), since the hardware circuitry needed to correctly perform an operation differs substantially depending on the operand's representation — this tight coupling between operation and operand type is a key reason why instruction sets typically include multiple variants of arithmetic and comparison instructions, one for each supported data type, rather than a single generic operation.

This same instruction, ADD R1, R2, [R3+4], can also be contrasted with an equivalent operation written using a different addressing mode to highlight the flexibility operands provide: ADD R1, R2, #4 would instead add the immediate constant 4 directly to R2 (rather than the value stored at the memory address R3+4), demonstrating that the identical opcode (ADD) combined with different operand-addressing choices produces entirely different computational results, underscoring why both the operation and the precise addressing mode of each operand must be correctly specified for an instruction to behave as the programmer intends.