VHDL

1. (a) What is the difference between CPLD and FPGA? Explain both of them according to their applications. [10]

(b) What is routing? Explain briefly. [6]

1. (a) Write about the design flow for ASIC. [8]

(b) State the difference between synthesis and simulation and explain the logic synthesis in detail. [8]

2. Define the following in VHDL: (i) Entity (ii) Architecture (iii) Package (iv) Configuration [16]

2. (a) What is VHDL? Explain advantage and limitations of VHDL. [8]

(b) Write short note on: (i) Behavioral Modelling (ii) Structural modelling. [8]

3. (a) Write a VHDL code for 1:16 line decoder. [8]

(b) Consider the function Y = A'BC + AB'C + ABC'. Implement the above function using 2:1 multiplexer and also write the VHDL code for it. [8]

3. Write a VHDL code for the following: (a) JK flip flop (b) D flip flop using JK flip flop (c) T flip flop (d) 3-input XOR gate. [16]

4. (a) What is finite state machine? [4]

(b) Design a Moore type FSM to detect 101 non overlapping sequence. Also design the synchronous sequential circuit using D-flip flop. [12]

4. (a) Write a VHDL code for serial adder. [8]

(b) State the difference between Mealy and Moore type FSM. [8]

5. (a) Draw a schematic diagram of data path circuit for multiplier operation. [8]

(b) What problems occur during clock synchronization? Also explain the techniques to avoid them. [8]

5. (a) What is memory organization? Explain 6T SRAM in detail. [8]

(b) How external devices are interfaced with CPU? Explain in detail. [8]