Question 1

Q.1. What is virtual memory?

Accepted Answer

Virtual memory is a memory management technique using secondary storage to extend the apparent size of main memory, giving each program the illusion of a large, contiguous address space managed transparently by the OS and MMU.

Question 2

Q.2. What is meant by an interleaved memory?

Accepted Answer

Interleaved memory divides memory into multiple independently-accessible banks so consecutive addresses lie in different banks, allowing overlapped/simultaneous access to increase effective memory bandwidth.

Question 3

Q.3. Define segmentation.

Accepted Answer

Segmentation divides a program's logical address space into variable-sized, logically meaningful segments (code, data, stack), each independently addressed via a segment number and offset.

Question 4

Q.4. Explain input-output processor.

Accepted Answer

An input-output processor (IOP) is a dedicated processor that autonomously manages I/O data transfers between peripherals and memory, executing its own I/O channel programs independently of the main CPU.

Question 5

Q.5. Write the rules to perform addition of floating point numbers.

Accepted Answer

Floating-point addition requires aligning the exponents of both operands (by shifting the smaller-exponent mantissa right), adding the aligned mantissas, then normalizing and rounding the result.

Question 6

Q.1. What are the addressing modes? Explain each in brief with diagram.

Accepted Answer

Addressing modes (immediate, direct, indirect, register, register indirect, indexed, relative) define how an instruction's address field is interpreted to locate the actual operand, trading off flexibility, instruction length, and access speed.

Question 7

Q.2. Describe in detail about the bus arbitration techniques in DMA.

Accepted Answer

Bus arbitration techniques in DMA — daisy chaining, polling, and independent request/grant lines — determine which of multiple simultaneously-requesting DMA devices gains control of the shared system bus.

Question 8

Q.3. What are the 3 different cache memory schemes? Explain in detail.

Accepted Answer

The three main cache mapping schemes are direct mapping (each memory block maps to exactly one cache line), fully associative mapping (any block can go in any cache line), and set-associative mapping (a hybrid where each block maps to a specific set containing multiple lines).

Question 9

Q.4. What are the various modes of data transfer to and from the computer sys…

Accepted Answer

Data transfer to/from a computer system occurs via three main modes: Programmed I/O (CPU actively polls/transfers each data item), Interrupt-driven I/O (device signals the CPU when ready, allowing other work in between), and DMA (Direct Memory Access, where a dedicated controller transfers blocks of data directly to/from memory without CPU involvement).

Question 10

Q.5. Explain Flynn's classification with suitable examples.

Accepted Answer

Flynn's classification (SISD, SIMD, MISD, MIMD) categorizes computers by instruction/data stream multiplicity: SISD is a standard uniprocessor, SIMD applies one instruction across many data elements (e.g., GPUs), MISD is a rare redundant/fault-tolerant design, and MIMD covers general multiprocessors/clusters.

Question 11

Q.6. What is the difference between cache memory & associative memory? Explai…

Accepted Answer

Cache memory is a small, fast buffer holding recently/frequently used data based on locality of reference and accessed via direct/set-associative mapping using a tag comparison, while associative memory is content-addressable, searched in parallel by data content rather than address, used for fast lookup applications beyond just caching.

Question 12

Q.1. Describe different instruction formats and illustrate the same with an e…

Accepted Answer

Instruction formats — three-address, two-address, one-address (accumulator), and zero-address (stack) — differ in how many explicit operand addresses are encoded, trading off instruction length against total instruction count for a given computation.

Question 13

Q.2. Describe in detail about the memory technologies.

Accepted Answer

Memory technologies span the hierarchy from fast, volatile, expensive registers and SRAM cache through DRAM main memory, to slower, non-volatile, cheaper secondary storage (magnetic disk, SSD) and ROM/EEPROM-based firmware storage, each offering different speed-cost-capacity-volatility trade-offs.

Question 14

Q.3. Write short notes on:

Accepted Answer

A DMA controller autonomously manages block data transfers between I/O devices and memory without CPU intervention; stacks (LIFO) and queues (FIFO) are core linear data structures for storage/scheduling; arithmetic pipelining overlaps stages of complex floating-point operations across specialized segments for higher throughput.

Computer Architecture