Q6CMOS Design
Question
Q.6. Why is NAND gate preferred over NOR gate for fabrication.
Answer
NAND gates are preferred over NOR gates for CMOS fabrication because electron mobility exceeds hole mobility, making NAND's series NMOS transistors more area/speed efficient than NOR's series PMOS transistors, which would otherwise need to be oversized to compensate for lower hole mobility.
NAND gates are generally preferred over NOR gates for CMOS fabrication because electron mobility in silicon is roughly 2-3 times greater than hole mobility; in a NAND gate, the series-connected transistors in the pull-down network are NMOS (which conduct via faster electrons), while in a NOR gate the series-connected transistors in the pull-up network are PMOS (which conduct via slower holes) - since series-connected transistors must be sized larger to compensate for their added series resistance, a NOR gate's series PMOS transistors must be made substantially wider (and hence consume more silicon area) than a NAND gate's series NMOS transistors to achieve comparable switching speed, making NAND gates more area-efficient and faster for a given drive strength, and hence the preferred choice as a primitive building block gate in CMOS standard-cell libraries.