Q5Microprocessors

(a) 8085 ALP: Add Two 16-bit Numbers Using ADC Instruction

Problem setup: assume the first 16-bit number is stored at memory locations 2000H (low byte) and 2001H (high byte), the second 16-bit number is stored at 2002H (low byte) and 2003H (high byte), and the 16-bit sum is to be stored at 3000H (low byte) and 3001H (high byte).

LHLD 2000H   ; Load first number: L=2000H content, H=2001H content
XCHG         ; Move first number from HL to DE
LHLD 2002H   ; Load second number: L=2002H content, H=2003H content
MOV A,E      ; Get low byte of first number into accumulator
ADD L        ; Add low byte of second number (plain ADD, no prior carry)
MOV L,A      ; Store low byte of result back in L
MOV A,D      ; Get high byte of first number into accumulator
ADC H        ; Add high byte of second number WITH carry (ADC, propagates carry from low-byte addition)
MOV H,A      ; Store high byte of result back in H
SHLD 3000H   ; Store 16-bit result: 3000H=L, 3001H=H
HLT          ; Stop program execution

Program explanation: the program first loads the two 16-bit numbers into register pairs (using LHLD and XCHG to hold the first number safely in DE while the second is loaded into HL). It then adds the two low-order bytes using the plain ADD instruction (since there is no incoming carry to consider for the least-significant byte), storing this partial result and, crucially, capturing any carry-out into the processor's carry flag. It then adds the two high-order bytes specifically using the ADC (Add with Carry) instruction as required by the problem statement, which adds not only the two high-byte values but also the carry flag left over from the low-byte addition — this is the essential technique for correctly performing multi-byte (here, 16-bit) addition using an 8-bit processor's arithmetic instructions, since ignoring the carry propagation between the low and high bytes would produce an incorrect result whenever the low-byte addition itself produces a carry into the high byte. Finally, the 16-bit result (now held in HL) is stored to the specified memory locations using SHLD, and the program halts.

Register usage rationale: register pair DE is deliberately used to hold the first number safely aside while HL is reloaded with the second number, since HL is the only register pair for which a single instruction (LHLD) can directly load a 16-bit value from two consecutive memory locations, and XCHG provides the most efficient means of transferring this already-loaded value out of HL into DE so that HL can then be reused to fetch the second operand; without this exchange, an additional pair of MOV/LDA-style transfers would be needed to preserve the first number while loading the second. Using D and E (via MOV A,D and MOV A,E) to individually access the high and low bytes of the first number is a direct consequence of the 8085 not providing any instruction capable of adding the full contents of one register pair to the accumulator in a single step for ordinary 8-bit ADD/ADC arithmetic (DAD is the sole register-pair addition instruction, and it does not use ADC-style carry chaining in the way this problem specifically requires) — the byte-by-byte approach using the accumulator is therefore the standard technique for performing carry-propagating multi-byte addition on the 8085.

Why ADC and not plain ADD for the high byte: if the high bytes were instead added using a second plain ADD instruction, any carry generated by the earlier low-byte addition would simply be discarded, silently producing an incorrect final result whenever the two low bytes summed to a value exceeding FFH. For instance, if the low bytes are 0FFH and 002H, plain addition gives 101H, i.e., a result byte of 01H together with a carry-out of 1 into the carry flag; using ADC for the high-byte addition ensures this carry of 1 is correctly added into the high-byte sum, whereas using plain ADD instead would leave the high byte one less than the true mathematical result, an error that would occur intermittently and only for specific operand combinations, making it a particularly easy class of bug to overlook during program testing. This is precisely why the question paper explicitly specifies the use of ADC — it is not merely a stylistic choice but a strict correctness requirement for any 16-bit (or wider, multi-byte) addition performed using the 8085's 8-bit arithmetic unit.

Flag behaviour through the routine: the ADD L instruction affects all the arithmetic flags (S, Z, AC, P, CY) based on the low-byte addition alone, but it is specifically the carry flag CY that matters for the subsequent step, since ADC H then adds the value of CY (0 or 1) into the high-byte sum in addition to the two 8-bit operands; the AC (auxiliary carry) flag, although also updated by both ADD and ADC, is not relevant to this particular 16-bit binary addition (it would matter only if a subsequent DAA-style BCD adjustment were also required, which this problem does not call for).

(b) Format of SIM Instruction

The SIM (Set Interrupt Mask) instruction is a single-byte 8085 instruction used to control the masking of the three vectored hardware interrupts (RST 7.5, RST 6.5, RST 5.5) and the serial output data line (SOD), based on the content of the accumulator at the time SIM is executed. Before executing SIM, the programmer must first load the accumulator with an appropriate bit pattern reflecting the desired interrupt mask and serial output configuration; the SIM instruction then reads this accumulator content and applies it to the corresponding internal interrupt-mask and serial-output control logic.

Bit-field meanings: bit D0 (M5.5), D1 (M6.5), and D2 (M7.5) are the individual interrupt mask bits for RST 5.5, RST 6.5, and RST 7.5 respectively — setting a mask bit to 1 disables (masks) the corresponding interrupt, while 0 enables it. Bit D3 (MSE, Mask Set Enable) must be set to 1 for the mask bits D0-D2 to actually take effect when SIM executes (if MSE=0, any values in D0-D2 are ignored, leaving the existing masks unchanged) — this MSE-gating mechanism allows a program to use SIM purely for its serial-output function (bits D6-D7) without inadvertently disturbing the existing interrupt mask configuration. Bit D4 (R7.5) is a special reset control for the RST 7.5 interrupt's internal flip-flop — setting D4=1 clears (resets) a pending RST 7.5 interrupt request that may have been latched, without affecting RST 6.5 or RST 5.5. Bit D5 is unused (don't care). Bit D6 (SDE, Serial Data Enable) must be set to 1 for the SOD output pin to actually be updated with the value in bit D7 when SIM executes; if SDE=0, bit D7 is ignored and SOD remains at its previous state. Bit D7 (SOD) directly specifies the new logic level to be output on the SOD pin, provided SDE=1. This flexible, single-instruction bit-field format allows a single SIM instruction to simultaneously (or selectively, using the MSE and SDE gating bits) configure interrupt masking and serial output in whatever combination a given program requires.

Practical role of SIM in serial communication: because the 8085 provides only a single serial output bit (SOD) rather than a dedicated UART, any multi-bit serial data byte to be transmitted must be sent out one bit at a time under direct software control, with SIM being the only instruction capable of updating SOD. A typical software-driven serial transmit routine loads the accumulator with the desired bit value in D7 together with SDE=1 in D6 (and, if interrupt masking changes are not simultaneously required, MSE=0 so that D0-D2 are ignored), executes SIM to place that bit onto SOD, and then waits for a precisely-timed software delay (or a timer-driven interrupt) corresponding to one bit period of the desired baud rate before repeating the process for the next bit — this bit-banging approach was a common, low-cost technique in simple 8085-based systems needing only occasional or low-speed serial output, avoiding the expense of a dedicated serial-communication interface chip such as the 8251 USART for undemanding applications. Because SIM also simultaneously controls interrupt masking, care must be taken in such routines to set MSE=0 whenever only the serial-output function is intended, so that the existing RST 5.5/6.5/7.5 mask configuration already established elsewhere in the program is not inadvertently disturbed by an unrelated serial-output SIM call.