Q15Computer Architecture and Organization

The OS and CPU must mathematically synchronize with external hardware peripherals (like keyboards or hard drives) which operate at catastrophically slower speeds. The architectural approach to this synchronization defines the overall efficiency of the system.

1. Programmed I/O (Polling)

The absolute most primitive I/O architecture.

• Mechanism: The CPU mathematically commands the peripheral to perform a read/write operation. The CPU then enters a tight, infinite loop (Polling), aggressively checking a specific hardware status bit over and over again until the device signals it has finished.
• Demerit: This is a catastrophic waste of processing power. For a slow device like a printer, the CPU might execute millions of useless polling instructions, violently preventing it from executing any other useful mathematical tasks.

2. Interrupt-Driven I/O

The modern, highly efficient asynchronous architecture.

• Mechanism: The CPU commands the peripheral to perform the operation. Instead of waiting, the CPU instantly resumes executing completely different programs. When the slow peripheral finally finishes, it blasts a physical electrical signal (an Interrupt) across the system bus directly into the CPU.
• Execution: The CPU mathematically halts its current task, saves its state (Program Counter), jumps to the specific Interrupt Service Routine (ISR) to process the data, and then resumes the original task.
• Merit: Absolute maximum CPU utilization. Zero clock cycles are wasted waiting on slow mechanical hardware.