Q1Microcontroller and Embedded Systems
Question
Q.1. (a) Explain the pin diagram of 8051 micro-controller. [8]
(b) Explain the bit format of TMOD and TCON registers of 8051 microcontroller. [8]
Answer
The 8051 microcontroller is packaged in a standard 40-pin dual-in-line package (DIP), with its pins grouped into power supply pins, the crystal oscillator connection pins, four 8-bit bidirectional parallel I/O ports, and several dedicated control pins.
- Pins 40 and 20 (Vcc and GND): pin 40 supplies the +5V power supply to the chip, and pin 20 provides the ground reference connection.
- Pins 18 and 19 (XTAL2 and XTAL1): these two pins connect an external crystal (typically in the range of a few megahertz up to around 24 MHz for standard 8051 variants, most commonly 11.0592 MHz for accurate standard baud rate generation) along with two small loading capacitors to ground, forming the on-chip oscillator circuit that generates the microcontroller's internal clock signal.
- Pin 9 (RST, reset): holding this pin high for at least two machine cycles while the oscillator is running resets the microcontroller, initializing the program counter to 0000H and resetting most SFRs to their default power-up values, causing program execution to restart from the beginning of program memory.
- Port 0 (pins 32 to 39, P0.0 to P0.7): an 8-bit bidirectional I/O port that, unlike the other three ports, has no internal pull-up resistors and hence requires external pull-up resistors when used as a general-purpose output port; Port 0 additionally serves a dual, multiplexed function as the low-order address byte and the bidirectional data bus when the microcontroller is configured to access external program or data memory.
- Port 1 (pins 1 to 8, P1.0 to P1.7): an 8-bit bidirectional I/O port with internal pull-up resistors, dedicated purely to general-purpose I/O with no alternate bus functions in the basic 8051 (though certain pins carry alternate functions such as Timer 2 control inputs in the enhanced 8052 variant).
- Port 2 (pins 21 to 28, P2.0 to P2.7): an 8-bit bidirectional I/O port with internal pull-up resistors, which additionally serves as the high-order address byte output when accessing external memory whose address exceeds the 256-byte range directly addressable by Port 0 alone.
- Port 3 (pins 10 to 17, P3.0 to P3.7): an 8-bit bidirectional I/O port with internal pull-up resistors, whose individual pins additionally carry the microcontroller's key alternate special functions: P3.0 (RXD, serial data receive), P3.1 (TXD, serial data transmit), P3.2 (INT0, external interrupt 0), P3.3 (INT1, external interrupt 1), P3.4 (T0, Timer 0 external count input), P3.5 (T1, Timer 1 external count input), P3.6 (WR, external data memory write strobe), and P3.7 (RD, external data memory read strobe).
- Pin 31 (EA-bar, external access enable): when held high, the CPU fetches program instructions from internal ROM for addresses within the internal ROM's range and automatically switches to external program memory beyond that range; when held low, the CPU fetches all program instructions exclusively from external program memory regardless of address, ignoring any internal ROM entirely.
- Pin 30 (ALE, address latch enable): during an external memory access cycle, this pin pulses high to indicate that Port 0 currently carries the low-order address byte, signaling external latching circuitry to capture and hold this address byte before Port 0 switches over to carrying data.
- Pin 29 (PSEN-bar, program store enable): this pin is asserted low specifically during a fetch from external program memory, distinguishing an external program memory read from an external data memory read (which instead uses the RD-bar signal on P3.7).
TMOD Register Bit Format
The Timer Mode (TMOD) register is an 8-bit, non-bit-addressable special function register that configures the operating mode and basic function of both Timer 0 and Timer 1, with the upper nibble (bits 7-4) controlling Timer 1 and the lower nibble (bits 3-0) controlling Timer 0 in an identical, mirrored bit layout.
| Bit | Name | Function |
|---|---|---|
| 7 | GATE (Timer 1) | When set, Timer 1 runs only while the corresponding external interrupt pin (INT1) is simultaneously held high, in addition to the TR1 run control bit being set, enabling hardware-gated timing measurements; when cleared, Timer 1 runs whenever TR1 is set, regardless of the INT1 pin state. |
| 6 | C/T-bar (Timer 1) | Selects the counting source for Timer 1: when 0, Timer 1 counts internal machine cycles (functioning as a timer); when 1, Timer 1 counts external pulses applied to the T1 pin (functioning as an event counter). |
| 5, 4 | M1, M0 (Timer 1) | Select the operating mode of Timer 1: 00 selects Mode 0 (13-bit timer), 01 selects Mode 1 (16-bit timer), 10 selects Mode 2 (8-bit auto-reload timer), and 11 selects Mode 3 (split timer mode, in which Timer 1 is effectively held and TR1 has no further effect). |
| 3 | GATE (Timer 0) | Identical function to bit 7, but applied to Timer 0, gating Timer 0's operation with the INT0 external pin. |
| 2 | C/T-bar (Timer 0) | Identical function to bit 6, but applied to Timer 0, selecting between internal machine-cycle counting and external T0 pin event counting. |
| 1, 0 | M1, M0 (Timer 0) | Select the operating mode of Timer 0, with the same four mode encodings as for Timer 1, except that Mode 3 for Timer 0 has a distinct meaning, splitting Timer 0 into two separate independent 8-bit timers. |
TCON Register Bit Format
The Timer Control (TCON) register is an 8-bit, bit-addressable special function register that holds the run control bits and overflow flags for both timers, along with the external interrupt type-select and pending-flag bits.
| Bit | Name | Function |
|---|---|---|
| 7 | TF1 | Timer 1 overflow flag; set automatically by hardware when Timer 1 overflows (rolls over from its maximum count back to zero), and must be cleared by software (or is automatically cleared by hardware when the corresponding interrupt is serviced). |
| 6 | TR1 | Timer 1 run control bit; setting this bit to 1 starts Timer 1 running, and clearing it to 0 stops Timer 1. |
| 5 | TF0 | Timer 0 overflow flag, with identical function to TF1 but for Timer 0. |
| 4 | TR0 | Timer 0 run control bit, with identical function to TR1 but for Timer 0. |
| 3 | IE1 | External interrupt 1 edge-triggered flag, automatically set by hardware when the selected edge (falling edge, if IT1 is set) is detected on the INT1 pin. |
| 2 | IT1 | External interrupt 1 type-select bit; when set to 1, INT1 is triggered by a falling edge on the pin; when cleared to 0, INT1 is instead triggered by (and remains active while) the pin is held at a logic-low level. |
| 1 | IE0 | External interrupt 0 edge-triggered flag, with identical function to IE1 but for the INT0 pin. |
| 0 | IT0 | External interrupt 0 type-select bit, with identical function to IT1 but for the INT0 pin. |
Together, TMOD and TCON provide complete configuration and status monitoring capability for both of the 8051's timers and its two external interrupt inputs, with TMOD setting the static configuration (mode and counting source) before a timer is started, and TCON providing the dynamic run control and status flags used while the timer is actually running or while external interrupts are being serviced.