Q1IC Technology

Gettering is a wafer purification technique used in integrated circuit fabrication to remove unwanted metallic impurities (such as iron, copper, nickel, and gold) and crystallographic defects away from the active device region near the wafer surface, relocating them instead to a region of the wafer where they are electrically harmless, typically the wafer backside or the bulk substrate far from the active devices. Metallic impurities, even at extremely low concentrations of parts per billion, can introduce deep-level trap states within the silicon bandgap that act as generation-recombination centers, drastically reducing minority carrier lifetime, increasing junction leakage current, and degrading the performance of sensitive devices such as DRAM cells, CCDs, and bipolar transistors. Gettering works by creating a region of high defect density, mechanical strain, or chemical affinity for the impurity elsewhere in the wafer, which acts as a low-energy sink that impurities diffuse toward and become trapped in during subsequent high-temperature process steps, effectively depleting the impurity concentration in the device-active region.

Types of Gettering

• Extrinsic gettering: an external gettering site is deliberately introduced, most commonly by depositing a polysilicon layer on the wafer backside or by mechanically damaging (abrading, sandblasting, or laser-damaging) the backside, creating a highly defective, strained region whose dislocations and grain boundaries act as impurity traps.
• Intrinsic gettering: gettering sites are created within the bulk of the wafer itself, typically by a sequence of high-low-high temperature anneals that first drive out oxygen from a thin denuded zone near the surface (leaving the active device region free of oxygen precipitates), then nucleate oxygen precipitates and associated dislocation loops deep in the bulk during the subsequent lower-temperature anneal, and finally grow these bulk precipitates into effective gettering sites during the final high-temperature step, all while the near-surface denuded zone remains clean and defect-free for device fabrication.
• Phosphorus gettering: a heavily phosphorus-doped glass layer is grown or deposited, and metallic impurities such as gold and copper form stable, immobile complexes with the phosphorus-silicon glass network, trapping them at the interface rather than allowing them to diffuse into the active silicon.

Need for Surface Cleaning Before Processing

Surface cleaning of the silicon wafer is an essential step performed before nearly every high-temperature or deposition process in IC fabrication because the wafer surface readily accumulates several categories of contamination that severely degrade device yield and reliability if not removed. Particulate contamination (dust, abraded silicon, or photoresist residue) can physically block lithographic patterning or cause pinholes in thin deposited films. Organic contamination (residual photoresist, oils from handling, or airborne hydrocarbons) can interfere with subsequent oxide growth uniformity and adhesion of deposited layers. Ionic and metallic contamination (sodium, potassium, iron, copper, and other trace metals) can diffuse into the silicon during high-temperature steps and create the same kind of deep-level trap states discussed under gettering, degrading minority carrier lifetime and causing threshold voltage instability in MOS devices due to mobile ionic charge in the gate oxide. A native oxide layer that forms spontaneously on exposed silicon in air can also interfere with subsequent epitaxial growth, contact formation, or oxidation uniformity if not properly removed or accounted for immediately before the process step.

RCA Cleaning Method

The RCA clean, developed at RCA Laboratories, is the industry-standard wet chemical cleaning sequence for silicon wafers and consists of two principal steps. RCA-1 (Standard Clean 1, SC-1) uses a mixture of ammonium hydroxide, hydrogen peroxide, and deionized water (typically in a ratio of about 1:1:5) heated to around 75-80 degrees Celsius, and is primarily effective at removing organic contamination and particles; the peroxide oxidizes organic residues while the mild alkaline solution and the microscopic bubbling action of the peroxide's oxygen release helps lift and remove particulates from the surface through a combination of chemical dissolution and mechanical agitation. RCA-2 (Standard Clean 2, SC-2) uses a mixture of hydrochloric acid, hydrogen peroxide, and deionized water in similar proportions, also heated to around 75-80 degrees Celsius, and is primarily effective at removing alkali ions and metallic contamination, since the hydrochloric acid forms soluble chloride complexes with metal ions (such as iron, aluminum, and magnesium) that are then rinsed away, while the peroxide again assists by oxidizing the surface and any residual metals into a more easily dissolved state. A dilute hydrofluoric acid dip is typically performed between or after these steps to strip the thin native or chemical oxide layer that forms during the SC-1 and SC-2 treatments, along with any embedded contaminants within that oxide.

Piranha Cleaning Method

The Piranha clean uses a mixture of concentrated sulfuric acid and hydrogen peroxide (commonly in a ratio of about 3:1 to 4:1), which reacts exothermically to generate a strongly oxidizing solution capable of aggressively removing thick organic residues, photoresist, and other carbon-based contamination from the wafer surface, and is often used as a first, heavy-duty cleaning step before the more delicate RCA sequence when the wafer carries substantial photoresist or organic residue from a preceding lithography or etch step. The exothermic reaction between sulfuric acid and hydrogen peroxide generates significant heat and must be handled with appropriate safety precautions, but this same reactivity is what gives Piranha solution its strong oxidizing power against stubborn organic films that milder RCA-1 treatment alone might not fully remove.

Crystal Defects

Crystal defects are irregularities or discontinuities in the otherwise perfectly periodic arrangement of atoms in the silicon crystal lattice, and they are classified according to their dimensionality into point defects, line defects, planar (surface) defects, and volume defects.

• Point defects (zero-dimensional): these include vacancies (a missing atom at a lattice site), self-interstitials (an extra silicon atom occupying a position between regular lattice sites), and substitutional or interstitial impurity atoms (foreign atoms occupying either a regular lattice site or an interstitial position). Point defects are thermodynamically unavoidable at any temperature above absolute zero, with their equilibrium concentration increasing exponentially with temperature, and they play a central role in diffusion processes, since dopant atoms typically move through the crystal via vacancy-assisted or interstitial diffusion mechanisms.
• Line defects (one-dimensional): the most important line defect is the dislocation, which is a line along which the regular stacking of atomic planes is disrupted; edge dislocations arise from an extra half-plane of atoms inserted into the crystal, while screw dislocations arise from a shear distortion of the lattice. Dislocations can act as fast diffusion paths for impurities and as sites for enhanced impurity precipitation, often degrading device performance when they intersect the active device region.
• Planar (surface) defects (two-dimensional): these include stacking faults, where the normal stacking sequence of atomic planes is interrupted or shifted, and grain boundaries, which occur where crystal regions of different orientation meet, as in polycrystalline silicon. Stacking faults commonly form during epitaxial growth or oxidation and can act as gettering sites or, if present in the active device area, as sources of excess leakage current.
• Volume defects (three-dimensional): these include precipitates of impurities (such as oxygen precipitates formed during intrinsic gettering anneals) and voids or microscopic cavities within the crystal bulk, which can form during crystal growth from clusters of vacancies.