Q3Industrial Electronics

Given Data

• Supply voltage (rms), Vs = 240 V, f = 60 Hz
• Load resistance, R = 20 Ω
• Average output voltage, Vo,avg = 40% of maximum possible output voltage (Vo,max)

For a single-phase fully-controlled bridge rectifier with a resistive load, the peak supply voltage is:

The average output voltage of a fully-controlled single-phase bridge rectifier, as a function of firing (delay) angle α, is given by the standard controlled-rectifier relation:

The maximum possible average output voltage occurs at α=0° (i.e., the rectifier operating as an uncontrolled diode bridge), giving:

(a) Delay Angle α

Given Vo,avg = 40% of Vo,max:

Since Vo,avg=Vo,max·cos α, we have cos α = 0.4, giving:

(b) RMS and Average Output Current

The average output current follows directly from the average output voltage and load resistance (Ohm's law applies directly to average quantities for a purely resistive load):

The rms output voltage, obtained by integrating the squared instantaneous output voltage waveform (which follows Vm sin θ from θ=α to π, repeating identically in the next half-cycle due to bridge symmetry) over one half-cycle, works out numerically (via the standard closed-form rms expression for a controlled bridge rectifier output) to:

giving the rms output (load) current:

(c) Average and RMS Thyristor Current

In a single-phase fully-controlled bridge rectifier, each pair of diagonally-opposite thyristors conducts for exactly one half of the output cycle (the two pairs alternate conduction every half-cycle), so each individual thyristor carries the full load current for exactly half of the total conduction period. The average and rms thyristor currents are therefore related to the corresponding load (output) quantities by a factor of 1/2 for average current, and 1/√2 for rms current (since rms is computed over half the total number of identical conduction intervals):

(d) Input Power Factor

For a single-phase bridge rectifier supplying a purely resistive load, the input (supply-side) current has the same rms magnitude as the load current (since the bridge simply redirects each half-cycle of supply current through the load in the same direction, without altering its magnitude profile), so Is,rms=Irms=10.38 A. The actual real power delivered to the load is calculated from the rms load current and resistance:

and the apparent power drawn from the supply is:

giving the input power factor:

This power factor value, notably less than unity despite the load itself being purely resistive, illustrates a fundamental characteristic of phase-controlled rectifiers: delaying the firing angle α distorts the input current waveform away from a pure sinusoid in phase with the supply voltage (the current is 'chopped' and effectively phase-shifted/delayed relative to the voltage), introducing both a displacement component and harmonic distortion that together reduce the overall input power factor below unity, even though no reactive (inductive/capacitive) element is present in the load itself — this effect becomes more pronounced as α increases, and is one of the key practical disadvantages of phase-controlled rectification that must be weighed against its voltage-control benefits in industrial rectifier applications.

Significance of the Results

The calculated firing angle of α=66.42° indicates that the thyristors are being fired well past the natural zero-crossing of the supply voltage, deep into each half-cycle, which is consistent with the requirement of reducing the average output voltage to only 40% of the maximum achievable value — this relatively large delay angle is itself the underlying cause of the reduced 0.865 power factor, since a small α (output voltage close to Vo,max) would correspond to conduction beginning close to the voltage zero-crossing and hence a much higher power factor approaching unity, whereas increasingly large α values delay conduction further into each half-cycle, worsening both the displacement factor and the harmonic distortion factor that together make up the overall power factor. The thyristor average and rms current values (2.16 A and 7.34 A respectively) confirm that each device is thermally stressed at only a fraction of the total load duty, consistent with each thyristor conducting for exactly one half of the total cycle, and these figures would be the basis for selecting an appropriately rated thyristor device (with adequate average, rms, and surge current ratings) for this specific converter duty.

Harmonic Content of Input Current

The input line current drawn by a phase-controlled bridge rectifier from the AC supply is a non-sinusoidal, quasi-rectangular waveform (delayed in phase by the firing angle α relative to the supply voltage, for an inductive load, or exhibiting a discontinuous, delayed pulse shape for a resistive load as in this problem), and by Fourier analysis this distorted waveform can be decomposed into a fundamental-frequency component plus a series of odd harmonics (3rd, 5th, 7th, 9th, ...), since half-wave symmetry of the bridge output eliminates even-order harmonics from the line current. These harmonic currents contribute no useful real power to the load (only the in-phase component of the fundamental current does), yet they add to the total rms current drawn from the supply, which is precisely why the total power factor (which accounts for both the displacement of the fundamental component and the presence of these additional non-fundamental harmonic components, sometimes expressed as PF=Displacement Factor×Distortion Factor) is lower than the simple cosine of the firing angle alone — in industrial installations with many phase-controlled converters, this harmonic current injection into the supply network is a significant power-quality concern, often requiring input harmonic filters or higher-pulse-number converter configurations to keep harmonic distortion within utility-imposed limits.

Effect of Source Inductance

The analysis above assumes an ideal, zero-impedance AC supply; in practice, every AC source (including the utility supply and any interposed transformer) possesses a finite source (commutating) inductance Ls, which prevents the current in an outgoing thyristor pair from instantaneously falling to zero as the incoming pair begins to conduct at each commutation instant — instead, there is a finite overlap (commutation) angle μ during which both the outgoing and incoming thyristor pairs conduct simultaneously, effectively short-circuiting the supply momentarily through Ls. This commutation overlap causes a further reduction in the average output voltage below the ideal value calculated from Vo=(2Vm/π)cos α (an additional voltage drop proportional to source inductance and load current), introduces voltage notches in the supply waveform at each commutation instant (a significant source of electromagnetic interference in industrial installations with large converter loads), and slightly increases the effective (total) commutation-related distortion of the supply current beyond the ideal-source figures computed above, meaning practical converter design and supply transformer sizing must account for a realistic (non-zero) source inductance value rather than the idealized zero-impedance assumption used for the basic hand-calculation in this problem.