Q1Industrial Electronics

(a) Layered Structure, Construction, and Transistor Analogy of SCR

The Silicon Controlled Rectifier (SCR) is a four-layer, three-junction semiconductor device with an alternating P-N-P-N structure, forming three PN junctions labeled J1, J2, and J3 from top to bottom. The outermost P-layer forms the anode (A) terminal, the outermost N-layer forms the cathode (K) terminal, and a gate (G) terminal is connected to the inner P-layer (adjacent to the cathode-side N-layer), providing the external control terminal used to trigger the device into conduction.

Two-Transistor Analogy: the SCR's regenerative switching behavior is most easily understood by conceptually splitting its four-layer PNPN structure into two interconnected three-layer transistors: the upper three layers (P-N-P) form a PNP transistor (T1), and the lower three layers (N-P-N) form an NPN transistor (T2), with the two transistors cross-coupled such that the collector of T1 is connected to the base of T2, and the collector of T2 is connected to the base of T1 (sharing the middle N and P layers between the two conceptual transistors).

In this analogy, the collector current of T1 supplies the base current of T2, and the collector current of T2 (augmented by the externally-injected gate current, when applied) supplies the base current of T1, creating a positive (regenerative) feedback loop. Using the current-gain relationship Ic=αIe+Ico for each transistor (where α is the common-base current gain and Ico is the leakage current), it can be shown that the total anode current is given by:

This expression reveals the essential switching behavior of the SCR: as long as (α1+α2) remains well below unity, IA remains small (the device is in its blocking/off state), but as either transistor's current gain increases (which happens naturally as current through the device increases, since α in a real transistor rises with current), the sum (α1+α2) approaches unity, causing the denominator to approach zero and IA to increase in an uncontrolled, regenerative manner — this is precisely the avalanche-like turn-on (latching) mechanism of the SCR. Applying a gate current IG raises α2 (associated with the NPN section) sufficiently to push (α1+α2) toward unity, triggering this regenerative turn-on and switching the SCR into full conduction, after which the device remains latched on (continuing to conduct) even if the gate current is removed, so long as the anode current remains above the device's minimum holding current.

(b) Forward and Reverse Blocking Mode of SCR

Forward blocking mode: occurs when the anode is made positive with respect to the cathode (forward bias condition, as encountered in normal operation) but the gate has not yet received a triggering pulse. In this condition, junctions J1 and J3 are forward-biased, but the middle junction J2 remains reverse-biased, and it is this single reverse-biased junction J2 that supports almost the entire applied forward voltage, preventing any significant anode current from flowing (other than a small leakage current) — the SCR is thus said to be in its forward blocking (off) state, capable of withstanding a forward voltage up to its rated forward breakover voltage (VBO) without triggering, beyond which it would break over into conduction even without a gate pulse (a condition normally avoided in practical circuit operation).

Reverse blocking mode: occurs when the cathode is made positive with respect to the anode (reverse bias condition). In this condition, both junctions J1 and J3 become reverse-biased simultaneously (while J2 becomes forward-biased), and since two junctions are now reverse-biased in series, the device can withstand a substantial reverse voltage across the combined depletion regions of J1 and J3, again permitting only a small reverse leakage current to flow, until the device's rated reverse breakdown voltage is reached.

Key differences: the forward blocking mode is controllable — the device can be deliberately switched from blocking to conducting at any desired instant via a gate trigger pulse, whereas the reverse blocking mode is not controllable via the gate at all, since gate current has essentially no effect on the device's reverse characteristic (the gate junction geometry and its association with the forward-conduction P-N-P-N regenerative path means the reverse blocking capability is purely a function of the two series reverse-biased junctions J1 and J3, unaffected by any gate signal). Additionally, the forward blocking voltage rating (VBO) and the reverse blocking voltage rating (VBR) of a practical SCR, although often specified as similar or symmetric in general-purpose devices, are determined by different junction breakdown mechanisms and can differ substantially in specialized SCR designs (such as asymmetric or reverse-conducting thyristors used in some inverter applications), where the reverse blocking requirement is deliberately relaxed to optimize other forward-conduction characteristics.

Practical Construction: Amplifying Gate Structure

In large-area, high-current SCRs intended for industrial power applications, a simple single-point gate contact cannot supply enough initial turn-on current spreading to bring the entire cathode area into conduction quickly, since the regenerative turn-on process must physically propagate outward from the point nearest the gate at a finite plasma-spreading velocity, and a large cathode area energized too slowly can suffer excessive local di/dt stress near the gate before the rest of the device has turned on. Practical high-power SCRs therefore commonly employ an amplifying gate (regenerative gate) structure, in which the main external gate current first triggers a small auxiliary (pilot) thyristor region fabricated on the same silicon wafer, and the amplified output current of this pilot stage is then used internally to trigger the main power thyristor structure over a much larger initial contact periphery — this two-stage arrangement allows a comparatively small external gate-drive signal to reliably and rapidly turn on a physically large-area device, improving di/dt withstand capability and reducing local hot-spot heating during turn-on.

SCR Voltage and Current Ratings: di/dt and dv/dt

Two critical rate-limiting ratings govern safe SCR operation in industrial converter circuits:

• Critical rate of rise of current (di/dt rating): since conduction begins only in the small region near the gate and then spreads outward across the junction area, an excessively fast-rising anode current immediately after turn-on can concentrate current density in this still-small conducting region before it has spread sufficiently, causing localized heating that can permanently damage the device (forming a hot spot or a punch-through failure) — practical circuits limit di/dt within the manufacturer's rated value by inserting a small series inductor (a di/dt limiting inductor) in the anode circuit, and devices with amplifying gate structures inherently tolerate higher di/dt due to faster initial conduction spreading.
• Critical rate of rise of voltage (dv/dt rating): as noted in the discussion of dv/dt triggering, a fast-rising forward anode-cathode voltage couples a displacement current through junction J2's depletion-layer capacitance that can falsely trigger the device even without an intended gate pulse — practical converter circuits limit dv/dt within the rated value using an RC snubber network connected across the SCR, which slows the rate of voltage rise seen by the device during commutation transients.

Turn-On and Turn-Off Time Definitions

The SCR's dynamic switching behavior is further characterized by two standard timing parameters important for correct circuit design: the turn-on time (tgt), defined as the time interval from the application of the gate trigger pulse to the point where the anode current has risen to a specified fraction (typically 90%) of its final value, itself composed of a delay time (initial conduction near the gate) and a rise time (spreading of conduction across the full junction area); and the turn-off time (tq), defined as the minimum time interval, following the instant the anode current falls to zero (at the end of a conduction interval), that must elapse before a forward voltage can again be safely reapplied across the device without it spuriously re-triggering — this turn-off time is governed by the recombination of the excess stored minority carriers remaining in the device's inner layers, and its value (typically a few tens of microseconds for standard SCRs, or a few microseconds for fast inverter-grade devices) directly determines the maximum safe switching frequency and the minimum reverse/off-time interval that must be provided in commutation circuit design for forced-commutated thyristor converters and inverters.