Q6Advanced Power Electronics

(a) Working Methodology of Pulse Width Modulation Techniques

Pulse Width Modulation is a switching technique used in DC-AC inverters to control both the fundamental output voltage magnitude and the harmonic content of the output waveform by varying the width (on-duration) and number of switching pulses within each half-cycle of the output, rather than producing a single, fixed-width quasi-square pulse per half-cycle as in simple square-wave inverter operation.

Sinusoidal PWM (SPWM)

The most widely used PWM technique compares a low-frequency sinusoidal reference (modulating) signal, representing the desired fundamental output waveform, against a much higher-frequency triangular carrier signal; the inverter switch is turned on whenever the sinusoidal reference exceeds the triangular carrier, and turned off otherwise, naturally producing a series of pulses whose individual widths vary sinusoidally across the fundamental cycle (widest near the peak of the sine reference, narrowest near its zero crossing), such that the average (fundamental-frequency) value of this pulse train closely approximates the desired sinusoidal reference waveform, while pushing the unwanted harmonic content up to frequencies clustered around the (much higher) carrier frequency and its sidebands, which are then comparatively easy to filter out using a modest output filter.

The amplitude modulation index ma controls the fundamental output voltage magnitude (for ma≤1, linear modulation region, the fundamental output voltage is directly proportional to ma; increasing ma beyond 1, called overmodulation, allows some further fundamental voltage increase up to the maximum square-wave value but introduces low-order harmonics), while the frequency modulation ratio mf (typically a large integer, often chosen as an odd multiple of 3 for 3-phase inverters to help cancel certain triplen harmonics) determines the frequency at which the unwanted switching harmonics cluster, with a higher mf pushing these harmonics to higher frequencies (easier to filter) at the cost of increased switching losses in the inverter devices.

Other PWM Variants

Space Vector PWM (SVPWM): represents the desired 3-phase output as a rotating voltage space vector and directly synthesizes it using a specific sequence of the inverter's available discrete switching states (voltage vectors) and their respective time durations within each switching period, generally achieving somewhat better DC-bus utilization and lower harmonic distortion than basic sinusoidal PWM for the same switching frequency, at the cost of more complex real-time computation, typically implemented in a digital signal processor or microcontroller.

Third-harmonic injection PWM: deliberately adds a specific proportion of third-harmonic content to the sinusoidal reference signal before comparison with the carrier, which (since third-harmonic and its multiples cancel out in the line-to-line output voltage of a balanced 3-phase inverter) allows a higher fundamental output voltage to be achieved for a given DC-link voltage compared to plain sinusoidal PWM, without introducing any additional low-order harmonic distortion in the actual line-to-line output.

(b) Techniques for Harmonic Reduction

Beyond the inherent harmonic-clustering benefit of PWM switching itself, several additional and complementary techniques are used specifically to further reduce unwanted harmonic content in inverter output waveforms:

Selective Harmonic Elimination (SHE) PWM: uses a pre-calculated (offline-optimized) switching pattern with a specific, limited number of switching instants per half-cycle, chosen mathematically (by solving the relevant Fourier-series equations) to deliberately cancel out specific, targeted low-order harmonics (commonly the 5th, 7th, 11th and 13th, which are typically the most problematic for motor loads) while achieving the desired fundamental output voltage magnitude, offering good harmonic performance with a relatively low number of switchings per cycle (hence lower switching losses) compared to high-frequency sinusoidal PWM, though requiring more complex offline computation to determine the specific switching angles for each desired fundamental voltage/harmonic-elimination target.

Multilevel inverter topologies: rather than a simple 2-level inverter output (switching directly between +Vdc and -Vdc), multilevel inverter topologies (diode-clamped/neutral-point-clamped, flying-capacitor, and cascaded H-bridge configurations) synthesize the output waveform using several intermediate voltage levels, producing a stepped output waveform that much more closely approximates a true sinusoid even without high-frequency PWM switching, inherently reducing harmonic content (particularly beneficial for high-power, medium-voltage applications where high-frequency PWM switching losses would otherwise be prohibitive) at the cost of a substantially increased number of switching devices and more complex control.

Output filtering: a passive LC (inductor-capacitor) low-pass filter connected at the inverter's output directly attenuates the high-frequency switching harmonics (which, particularly with PWM switching, are clustered well above the fundamental frequency and therefore relatively easy to filter without significantly attenuating the desired fundamental component), providing a final, practical harmonic-reduction stage complementing whichever combination of PWM/multilevel switching techniques is used to generate the inverter's raw switched output waveform.

Quantitative Harmonic Content: Fourier Analysis of the PWM Output

For a single-phase half-bridge or full-bridge inverter under naturally-sampled sinusoidal PWM, the harmonic spectrum of the switched output voltage can be expressed (via the double Fourier series method) as a fundamental component at the reference frequency plus harmonic sidebands clustered around the carrier frequency and its integer multiples:

where the significant harmonic energy is concentrated in sidebands around k·mf (k = 1, 2, 3, ...) rather than as low-order harmonics near the fundamental — this is the mathematical basis for the earlier statement that PWM pushes unwanted harmonic energy to high frequencies clustered around the carrier, in sharp contrast to a simple square-wave inverter, whose output contains substantial energy directly at the 3rd, 5th, 7th (odd) harmonics with magnitude falling off only as 1/n relative to the fundamental.

Total Harmonic Distortion (THD) as a design metric: the quality of an inverter's output waveform is commonly quantified using:

where V1 is the fundamental rms voltage and Vn are the rms magnitudes of the individual harmonic components; increasing the PWM switching (carrier) frequency, or moving from a 2-level to a multilevel topology, both directly reduce THD, but at the cost of increased switching losses (for higher carrier frequency) or increased device count and control complexity (for multilevel topologies) — this THD-vs-loss/complexity trade-off is the central design decision in selecting an appropriate PWM/harmonic-reduction strategy for any specific inverter application, and RTU-level analysis of this topic typically expects the candidate to identify this trade-off explicitly rather than simply listing techniques in isolation.

Interaction Between PWM and Selective Harmonic Elimination

It is worth noting that SPWM/SVPWM and SHE-PWM represent two philosophically different approaches to harmonic control that are sometimes combined in modern high-power converters: high-frequency carrier-based PWM (SPWM/SVPWM) is preferred where switching losses are not the dominant constraint (lower power, higher switching-frequency-capable devices such as MOSFETs), pushing harmonics to high, easily-filtered frequencies, whereas SHE-PWM (with a small, fixed number of switchings per cycle, calculated offline to null out specific troublesome low-order harmonics) is preferred in very high-power, medium/high-voltage applications using slower-switching devices (high-power IGBTs, IGCTs, GTOs) where minimizing the number of switching transitions per cycle is essential to keep switching losses within the device's thermal capability, even though this leaves some residual, higher-order harmonic content that must then be handled by other means (larger output filter, or acceptance of somewhat higher torque ripple in a motor load).