Q2Microprocessor

The Program Status Word (PSW) is an 8-bit, bit-addressable Special Function Register in the 8051 microcontroller that holds several important status flags reflecting the outcome of the most recently executed arithmetic or logical instruction, along with bits controlling which of the four register banks is currently active. Its bit layout (from MSB, bit 7, to LSB, bit 0) is as follows:

• Bit 7 — CY (Carry flag): set to 1 if the last arithmetic operation produced a carry out of bit 7 (for addition) or a borrow into bit 7 (for subtraction); also used by bit-manipulation instructions as an accumulator for single-bit Boolean operations.
• Bit 6 — AC (Auxiliary Carry flag): set to 1 if the last arithmetic operation produced a carry out of bit 3 into bit 4 (a carry between the lower and upper nibble); primarily used to support BCD (Binary Coded Decimal) arithmetic via the DA A (Decimal Adjust Accumulator) instruction.
• Bit 5 — F0 (User-definable Flag 0): a general-purpose flag bit available for the programmer's own use, not affected by any hardware operation automatically — the programmer can set, clear or test this bit in software for any custom purpose (e.g., signaling a particular program state between different parts of the code).
• Bits 4,3 — RS1, RS0 (Register Bank Select bits): these two bits together select which of the four available register banks (Bank 0: 00H-07H, Bank 1: 08H-0FH, Bank 2: 10H-17H, Bank 3: 18H-1FH) is currently active and accessed by register-name instructions referring to R0-R7 — (RS1,RS0) = (0,0) selects Bank 0, (0,1) selects Bank 1, (1,0) selects Bank 2, and (1,1) selects Bank 3.
• Bit 2 — OV (Overflow flag): set to 1 if the last signed arithmetic operation produced a result that overflowed the valid signed 8-bit range (-128 to +127), i.e., if there was a carry out of bit 6 but not out of bit 7, or vice versa (an XOR of the carry-out of bit 6 and bit 7).
• Bit 1 — (Reserved/user-definable): this bit is not used by the 8051 hardware for any defined purpose and is available as an additional general-purpose flag bit in some implementations, though its behavior may be implementation-dependent and it is less commonly relied upon than F0.
• Bit 0 — P (Parity flag): automatically set to 1 if the accumulator currently holds a value with an odd number of 1-bits (odd parity), and cleared to 0 if it holds an even number of 1-bits — this flag is updated automatically by hardware after every instruction that affects the accumulator, useful for simple error-checking/parity-verification purposes in software.

Among these, the Carry (CY), Auxiliary Carry (AC) and Overflow (OV) flags are the ones most directly relevant to conditional branching and arithmetic error/overflow checking in typical assembly language programs, since instructions such as JC/JNC (Jump if Carry/Not Carry) directly test the CY flag to make data-dependent branching decisions following arithmetic operations, while the register bank select bits (RS1, RS0) provide the 8051's distinctive fast context-switching capability — since register content in an unused bank remains preserved even while another bank is active, an interrupt service routine can, for example, switch to a different register bank at its start (using just two instructions to set RS1/RS0) to gain its own private set of working registers without needing to individually save and restore each register used by the interrupted main program, substantially speeding up interrupt response and context-switch overhead compared to architectures lacking this multiple-register-bank feature.