Q5Microprocessor
Question
Q.5. Explain various timers and interrupts and their functions in 8051 microcontroller.
Answer
The 8051 has two 16-bit timers (Timer 0, Timer 1) with four selectable operating modes for timing, event counting, and baud-rate generation, and five interrupt sources (two external, two timer-overflow, one serial port), each individually enabled via IE and prioritized via IP, together enabling precise time-delay generation and responsive real-time event handling.
Timers: the 8051 provides two 16-bit timer/counter units, Timer 0 (formed from register pair TH0:TL0) and Timer 1 (TH1:TL1), each configurable via the TMOD register into one of four operating modes: Mode 0 (13-bit timer, legacy compatibility mode), Mode 1 (full 16-bit timer/counter, the most commonly used general-purpose mode, providing a maximum count range of 65,536 before overflow), Mode 2 (8-bit auto-reload mode, where the timer automatically reloads its start value from TH upon each overflow, ideal for generating precise, repetitive periodic events such as UART baud-rate clock pulses without software intervention on each overflow), and Mode 3 (split-timer mode specific to Timer 0, dividing it into two independent 8-bit timers, typically used when Timer 1 is needed exclusively and continuously for serial baud-rate generation while Timer 0 must still provide two separate general-purpose timing functions). Each timer is started and stopped under software control via the TR0/TR1 bits in TCON, and signals its overflow (count rolling over from all-1s back to 0) by automatically setting the TF0/TF1 flag bits, which can be polled directly in software or configured to trigger a Timer interrupt.
Interrupts: the 8051 has five interrupt sources — External Interrupt 0 (INT0, on pin P3.2), Timer 0 overflow, External Interrupt 1 (INT1, on pin P3.3), Timer 1 overflow, and the Serial Port interrupt (triggered by either the Receive Interrupt flag RI or Transmit Interrupt flag TI) — each individually enabled or disabled through corresponding bits in the Interrupt Enable (IE) special function register, with an additional global master enable/disable bit (EA) in the same register controlling all interrupts collectively. Each of the five interrupt sources can be individually assigned either high or low priority using the Interrupt Priority (IP) register, allowing a higher-priority interrupt to preempt (interrupt) the servicing of a lower-priority interrupt currently in progress, while interrupts of the same priority level are resolved, in case of simultaneous requests, according to a fixed default polling sequence (INT0, Timer 0, INT1, Timer 1, Serial Port, from highest to lowest default priority). External interrupts INT0 and INT1 can each be individually configured (via IT0/IT1 bits in TCON) to respond to either a continuous low logic level or a falling-edge transition on their respective pins, providing flexibility to interface with different types of external event-signaling hardware. Together, the timer and interrupt subsystems form the foundation of virtually all real-time embedded applications on the 8051, enabling precise software-independent time-base generation (for delays, PWM, baud rates) and prompt, prioritized response to asynchronous external events without requiring continuous software polling of every possible event source.