Q3Microprocessor

Data Transfer Instructions: move data between registers, internal RAM, external memory, and code memory. Examples: MOV A, R0 (copies R0's content into the accumulator); MOV 30H, #55H (stores the immediate value 55H into internal RAM address 30H); MOVX A, @DPTR (reads a byte from external data memory, addressed by DPTR, into the accumulator); MOVC A, @A+DPTR (reads a byte from code/program memory, at the address formed by adding the accumulator to DPTR, commonly used for lookup tables).

Arithmetic Instructions: perform addition, subtraction, increment, decrement, multiplication and division on 8-bit operands. Examples: ADD A, R1 (adds R1's content to the accumulator, affecting CY, AC, OV flags); SUBB A, R2 (subtracts R2's content and the current carry/borrow from the accumulator); INC R3 (increments R3 by 1); MUL AB (multiplies the accumulator and B register, an unsigned 8×8→16-bit multiplication with the result split across A and B); DIV AB (divides the accumulator by the B register, with quotient in A and remainder in B).

Logical Instructions: perform bitwise Boolean operations. Examples: ANL A, R4 (bitwise AND of accumulator and R4); ORL A, #0FH (bitwise OR of accumulator with immediate value 0FH); XRL A, R5 (bitwise XOR); CPL A (complements — inverts every bit of — the accumulator).

Branching Instructions: alter the normal sequential flow of program execution. Examples: SJMP LABEL (short, relative unconditional jump within ±128 bytes); LJMP LABEL (long, absolute unconditional jump anywhere in the 64KB code memory space); JZ LABEL (conditional jump taken if the accumulator is currently zero); JNC LABEL (conditional jump taken if the Carry flag is currently clear); ACALL/LCALL LABEL (calls a subroutine, pushing the return address onto the stack); RET (returns from a subroutine, popping the return address back off the stack into the Program Counter).

Bit-Manipulation Instructions: a distinctive feature of the 8051, operating directly on individual bits (rather than whole bytes) of bit-addressable memory locations and SFRs. Examples: SETB P1.0 (sets bit 0 of Port 1 to logic 1); CLR P1.0 (clears bit 0 of Port 1 to logic 0); CPL TR0 (complements/toggles the Timer 0 run-control bit); JB ACC.7, LABEL (conditional jump taken if bit 7 of the accumulator is currently set); JNB P3.2, LABEL (conditional jump taken if bit P3.2 is currently clear). This dedicated bit-addressing capability — unusual among 8-bit microcontrollers of its era — is particularly valuable for embedded control applications requiring frequent, efficient testing and manipulation of individual status/control flags and I/O pins, without needing to read-modify-write the entire containing byte each time, a significant efficiency and code-simplicity advantage of the 8051 architecture for typical bit-oriented embedded control tasks.