Q2Microprocessor and Interfaces
Question
(a) Explain the 8086 addressing modes with examples. (b) Discuss the concept of segmentation and offset addressing in 8086.
Answer
The 8086 supports eight distinct addressing modes for locating an operand's effective address, ranging from immediate constants to complex base-indexed combinations, and every memory-referencing mode ultimately feeds into the segmentation mechanism that combines a segment register and an offset to form the final 20-bit physical address.
An addressing mode is the rule the CPU uses to determine where an instruction's operand actually resides. The 8086 supports several categories, roughly split between modes that need no memory access at all and modes that compute a 16-bit Effective Address (EA) within a segment.
Modes with No Memory Reference
- Immediate Addressing: The operand's value is embedded directly in the instruction's byte stream. Example:
MOV AX, 1234Hloads the constant 1234H directly into AX; no memory access is needed to fetch the operand. - Register Addressing: The operand is already held in one of the CPU's internal registers. Example:
MOV AX, BXcopies the contents of BX into AX. This is the fastest mode since it never touches the external bus.
Memory Addressing Modes (Effective Address in the BIU)
- Direct Addressing: The instruction directly supplies the 16-bit offset within the current data segment. Example:
MOV AX, [5000H]loads AX from the word at offset 5000H in DS. - Register Indirect Addressing: The offset is held inside a base or index register (BX, SI, or DI), with no displacement added. Example:
MOV AX, [BX]fetches the word whose offset equals the current value of BX. - Based Addressing: The effective address is the sum of a base register (BX or BP) and an 8-bit or 16-bit displacement coded in the instruction. Example:
MOV AX, [BX+10H]- commonly used to access a specific field inside a fixed-size structure or record. - Indexed Addressing: The effective address is the sum of an index register (SI or DI) and a displacement. Example:
MOV AX, [SI+20H]- well suited for stepping through array elements by adjusting the displacement or incrementing SI. - Based-Indexed Addressing: The effective address combines a base register, an index register, and an optional displacement. Example:
MOV AX, [BX+SI+5H]- the two-register combination makes this the natural mode for addressing two-dimensional arrays, where the base tracks the row and the index tracks the column (or vice versa).
Relative and I/O Addressing
Control-transfer instructions like JMP and conditional jumps typically use relative addressing, where the displacement coded in the instruction is added to the current Instruction Pointer to compute the target address. I/O instructions (IN/OUT) use direct or register (DX-based) port addressing to reach the separate 64 KB I/O address space.
Every effective address computed above is only a 16-bit offset; it is meaningless without a segment base to anchor it. Segmentation is the mechanism of dividing the 8086's 1 MB physical address space into 64 KB logical blocks called segments, whose base addresses live in the four segment registers - CS for code, DS for data, SS for the stack, and ES as an extra data segment.
The Bus Interface Unit combines the appropriate segment register with the effective address (offset) computed by whichever addressing mode the instruction uses, to compute the final 20-bit physical address sent out on the address bus:
For instance, MOV AX, [BX+SI+5H] with DS = 3000H, BX = 0200H, and SI = 0010H computes an effective address of 0200H + 0010H + 0005H = 0215H, giving a physical address of (3000H x 10H) + 0215H = 30000H + 0215H = 30215H. This separation of segment and offset is what allows 16-bit registers to reach a full 1 MB space, and it provides practical advantages: programs can be relocated by changing only the segment register, code and data can be kept in logically separate regions, and the stack can be isolated from the data area to reduce the risk of one overwriting the other.