Q2Microprocessor and Interfaces
Question
(a) Explain the instruction set of 8085 with classification (Data Transfer, Arithmetic, Logical, Branch, Stack). (b) Write an assembly language program to add two 8-bit numbers.
Answer
A definitive classification of the 8085 Instruction Set (Data Transfer, Arithmetic, Logical, Branch, Stack), followed by the mathematical engineering of a fully commented Assembly Language program to add two 8-bit hex numbers from memory.
The Intel 8085 is physically hardwired to recognize exactly 74 fundamental instruction types, producing 246 unique mathematical opcodes. This massive instruction set is rigidly categorized into five distinct architectural groups based on the physical silicon circuitry they activate.
1. Data Transfer Group
These instructions violently copy mathematical data between hardware registers, or between registers and physical RAM. They absolutely never alter the Flag register.
- MOV A, B: Physically copies 8-bit data from Register B into the Accumulator.
- MVI C, 35H: Aggressively loads the immediate hex value 35 directly into Register C.
- LDA 2050H: Fetches the byte physically stored at RAM address 2050H into the Accumulator.
2. Arithmetic Group
These instructions violently activate the ALU to perform binary addition, subtraction, increment, or decrement. They always mathematically alter the Flag register based on the result.
- ADD B: Mathematically adds the contents of B to the Accumulator, storing the result in A.
- SUB C: Mathematically subtracts C from A.
- INX H: Aggressively increments the 16-bit HL register pair by exactly 1.
3. Logical Group
These instructions execute strict bitwise Boolean algebra (AND, OR, XOR) and hardware rotations on the Accumulator.
- ANA B: Mathematically executes a bitwise Logical AND between A and B.
- XRA C: Executes a bitwise Exclusive-OR.
- RLC: Violently rotates every single bit in the Accumulator one position to the left.
4. Branch Control Group
These instructions are the absolute core of software logic. They mathematically manipulate the 16-bit Program Counter (PC) to force the CPU to jump to different memory addresses, breaking linear execution.
- JMP 3000H: Unconditional jump. The CPU violently overwrites the PC with 3000H.
- JZ 4000H: Conditional jump. The CPU checks the Zero Flag. IF the flag is 1, it jumps to 4000H. If 0, it ignores the instruction and continues.
5. Stack and Machine Control Group
These execute massive stack operations or manipulate CPU hardware state.
- PUSH B: Violently rams the 16-bit contents of the BC register pair onto the top of the RAM Stack.
- POP D: Yanks the top 16 bits off the Stack and violently loads them into the DE pair.
- HLT: Completely halts the CPU execution clock.
Problem Statement: Mathematically add two 8-bit numbers physically located at RAM addresses 2050H and 2051H. Store the resulting sum at 2052H, and store any generated carry at 2053H.
``assembly
; INITIALIZATION
LXI H, 2050H ; Load 16-bit address 2050H into HL pair (H=20, L=50). HL is now the Memory Pointer (M).
MVI C, 00H ; Initialize Register C to 00H. This will strictly track our mathematical Carry.
; EXECUTION
MOV A, M ; Fetch the first 8-bit operand from address 2050H into the Accumulator.
INX H ; Increment HL pair to 2051H to point to the second operand.
ADD M ; Mathematically ADD the second operand (at 2051H) to the Accumulator.
; CARRY DETECTION
JNC STORE_SUM ; Jump if No Carry (Check the Carry Flag). If Carry is 0, skip the next instruction.
INR C ; If Carry is 1, violently Increment Register C from 00H to 01H.
; DATA STORAGE
STORE_SUM: ; This is a jump label.
INX H ; Increment HL pair to 2052H.
MOV M, A ; Store the mathematical SUM (currently in the Accumulator) into RAM at 2052H.
INX H ; Increment HL pair to 2053H.
MOV M, C ; Store the CARRY status (currently in Register C) into RAM at 2053H.
; TERMINATION
HLT ; Halt microprocessor execution.
``